iwdg.h — Maple v0.0.12 Documentation

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# `iwdg.h`

Independent Watchdog (IWDG) support.

Contents

- Usage Note
- Types
- Devices
- Functions
- Register Map Base Pointers
- Register Bit Definitions
  - Key register
  - Prescaler register
  - Status register

## Usage Note

To use the independent watchdog, first call `iwdg_init()` with the appropriate prescaler and IWDG counter reload values for your application. Afterwards, you must periodically call `iwdg_feed()` before the IWDG counter reaches 0 to reset the counter to its reload value. If you do not, the chip will reset.

Once started, the independent watchdog cannot be turned off.

## Types

struct iwdg_reg_map

> Independent watchdog register map type.

> Public Members

> > __io uint32 KR

> >   Key register.

> > __io uint32 PR

> >   Prescaler register.

> > __io uint32 RLR

> >   Reload register.

> > __io uint32 SR

> >   Status register.

iwdg_prescaler enum

  Independent watchdog prescalers.

  These divide the 40 kHz IWDG clock.

  Values:

  - `IWDG_PRE_4``= IWDG_PR_DIV_4` -

    Divide by 4.

  - `IWDG_PRE_8``= IWDG_PR_DIV_8` -

    Divide by 8.

  - `IWDG_PRE_16``= IWDG_PR_DIV_16` -

    Divide by 16.

  - `IWDG_PRE_32``= IWDG_PR_DIV_32` -

    Divide by 32.

  - `IWDG_PRE_64``= IWDG_PR_DIV_64` -

    Divide by 64.

  - `IWDG_PRE_128``= IWDG_PR_DIV_128` -

    Divide by 128.

  - `IWDG_PRE_256``= IWDG_PR_DIV_256` -

    Divide by 256.

## Devices

None at this time.

## Functions

void iwdg_init(iwdg_prescaler prescaler, uint16 reload)

  Initialise and start the watchdog.

  The prescaler and reload set the timeout. For example, a prescaler of IWDG_PRE_32 divides the 40 kHz clock by 32 and gives roughly 1 ms per reload.

  Parameters: | `prescaler` - Prescaler for the 40 kHz IWDG clock. `reload` - Independent watchdog counter reload value.

void iwdg_feed(void)

  Reset the IWDG counter.

  Calling this function will cause the IWDG counter to be reset to its reload value.

## Register Map Base Pointers

IWDG_BASE

  Independent watchdog base pointer.

## Register Bit Definitions

### Key register

IWDG_KR_UNLOCK

IWDG_KR_FEED

IWDG_KR_START

### Prescaler register

IWDG_PR_DIV_4

IWDG_PR_DIV_8

IWDG_PR_DIV_16

IWDG_PR_DIV_32

IWDG_PR_DIV_64

IWDG_PR_DIV_128

IWDG_PR_DIV_256

### Status register

IWDG_SR_RVU_BIT

IWDG_SR_PVU_BIT

IWDG_SR_RVU

IWDG_SR_PVU

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