Digital to Analog Conversion (DAC) support.
Contents
DAC device type.
Public Members
- dac_reg_map * regs
Register map.
DAC register map.
Public Members
- __io uint32 CR
Control register.
- __io uint32 SWTRIGR
Software trigger register.
- __io uint32 DHR12R1
Channel 1 12-bit right-aligned data holding register.
- __io uint32 DHR12L1
Channel 1 12-bit left-aligned data holding register.
- __io uint32 DHR8R1
Channel 1 8-bit left-aligned data holding register.
- __io uint32 DHR12R2
Channel 2 12-bit right-aligned data holding register.
- __io uint32 DHR12L2
Channel 2 12-bit left-aligned data holding register.
- __io uint32 DHR8R2
Channel 2 8-bit left-aligned data holding register.
- __io uint32 DHR12RD
Dual DAC 12-bit right-aligned data holding register.
- __io uint32 DHR12LD
Dual DAC 12-bit left-aligned data holding register.
- __io uint32 DHR8RD
Dual DAC 8-bit right-aligned data holding register.
- __io uint32 DOR1
Channel 1 data output register.
- __io uint32 DOR2
Channel 2 data output register.
Initialize the digital to analog converter.
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Side Effects:: | May set PA4 or PA5 to INPUT_ANALOG |
Write a 12-bit value to the DAC to output.
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Enable a DAC channel.
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Side Effects:: | May change pin mode of PA4 or PA5 |
Disable a DAC channel.
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DAC register map base address.
Channel 1:
Channel 2: